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Travelled to:
2 × USA
Collaborated with:
S.Venkataraman R.Puri S.Griffith A.Oberai R.Madge G.Yeric Y.Zorian A.J.Strojwas M.Campbell V.Gerousis J.Hogan J.Kibarian M.Levitt D.Pramanik M.Templeton
Talks about:
manufactur (1) target (1) yield (1) fault (1) work (1) when (1) miss (1) make (1) who (1)

Person: Walter Ng

DBLP DBLP: Ng:Walter

Contributed to:

DAC 20072007
DAC 20042004

Wrote 2 papers:

DAC-2007-VenkataramanPGOMYNZ
Making Manufacturing Work For You (SV, RP, SG, AO, RM, GY, WN, YZ), pp. 107–108.
DAC-2004-StrojwasCGHKLNPT #fault #question
When IC yield missed the target, who is at fault? (AJS, MC, VG, JH, JK, ML, WN, DP, MT), p. 80.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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