Travelled to:
1 × USA
2 × France
Collaborated with:
Y.Hu X.Li Y.Xie G.Yan S.Pan B.Chen J.Song P.Xu Z.M.(.Jiang Y.Xu J.Ma G.Chen Ling Liang S.Li Lei Deng 0003 Pengfei Zuo Yu Ji 0002 Xinfeng Xie Y.Ding C.Liu T.Sherwood
Talks about:
voltag (2) thread (2) emerg (2) cost (2) base (2) architectur (1) substanti (1) framework (1) orchestr (1) approach (1)
Person: Xing Hu
DBLP: Hu:Xing
Contributed to:
Wrote 5 papers:
- DAC-2014-HuXMCHX #thread
- Thermal-Sustainable Power Budgeting for Dynamic Threading (XH, YX, JM, GC, YH, YX), p. 6.
- DATE-2013-HuYH0 #concurrent #low cost #multi #named #thread
- Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications (XH, GY, YH, XL), pp. 208–213.
- DATE-2011-PanHHL #effectiveness
- A cost-effective substantial-impact-filter based method to tolerate voltage emergencies (SP, YH, XH, XL), pp. 311–315.
- ASE-2018-ChenSXHJ #approach #automation #execution #metric #test coverage
- An automated approach to estimating code coverage measures via execution logs (BC, JS, PX, XH, ZM(J), pp. 305–316.
- ASPLOS-2020-HuLL0Z0XDLSX #architecture #framework #learning #named
- DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints (XH, LL, SL, LD0, PZ, YJ0, XX, YD, CL, TS, YX), pp. 385–399.