Travelled to:2 × USA
Collaborated with:M.Mogaki M.Kimura T.Hino J.Sakemi M.Kutsuwada A.Tsukizoe T.Satoh Y.Ogawa T.Ishii H.Terai T.Kozawa K.Yuyama K.Chiba
Talks about:high (2) masterslic (1) placement (1) algorithm (1) approach (1) practic (1) generat (1) densiti (1) system (1) layout (1)
Person: Yoichi Shiraishi
DBLP: Shiraishi:Yoichi
Contributed to:
199319881986Wrote 3 papers:
- DAC-1993-MogakiSKH #approach #layout
- Cooperative Approach to a Practical Analog LSI Layout System (MM, YS, MK, TH), pp. 544–549.
- DAC-1988-ShiraishiSKTS #generative #logic
- A High Packing Density Module Generator for CMOS Logic Cells (YS, JS, MK, AT, TS), pp. 439–444.
- DAC-1986-OgawaISTKYC #algorithm #optimisation #performance
- Efficient placement algorithms optimizing delay for high-speed ECL masterslice LSIs (YO, TI, YS, HT, TK, KY, KC), pp. 404–410.