Travelled to:
4 × USA
Collaborated with:
A.Tsukizoe T.Kozawa H.Fukuda Y.Shiraishi M.Kutsuwada T.Satoh C.Miura T.Ishii H.Horino T.Ishiga S.Sato
Talks about:
pattern (2) generat (2) vlsi (2) mask (2) high (2) data (2) algorithm (1) densiti (1) concurr (1) checker (1)
Person: Jun'ya Sakemi
DBLP: Sakemi:Jun=ya
Contributed to:
Wrote 4 papers:
- DAC-1988-ShiraishiSKTS #generative #logic
- A High Packing Density Module Generator for CMOS Logic Cells (YS, JS, MK, AT, TS), pp. 439–444.
- DAC-1983-TsukizoeSKF
- MACH : a high-hitting pattern checker for VLSI mask data (AT, JS, TK, HF), pp. 726–731.
- DAC-1981-KozawaTSMI #algorithm #concurrent
- A concurrent pattern operation algorithm for VLSI mask data (TK, AT, JS, CM, TI), pp. 563–570.
- DAC-1974-KozawaHISS #automation #generative #layout
- Advanced LILAC — an Automated Layout Generation system for MOS/LSIs (TK, HH, TI, JS, SS), pp. 26–46.