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Travelled to:
1 × Germany
1 × USA
Collaborated with:
J.D.Echeverri M.Meijer J.P.d.Gyvez Y.He R.P.Kleihorst Z.Ye A.A.Abbo S.M.Londono H.Corporaal
Talks about:
ultra (2) low (2) throughput (1) processor (1) synthesi (1) frequenc (1) voltag (1) energi (1) xetal (1) scale (1)

Person: Yu Pu


Contributed to:

DATE 20142014
DAC 20102010

Wrote 2 papers:

DATE-2014-PuEMG #logic #power management #scalability #synthesis
Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling (YP, JDE, MM, JPdG), pp. 1–2.
DAC-2010-HePKYALC #energy #named #throughput
Xetal-Pro: an ultra-low energy and high throughput SIMD processor (YH, YP, RPK, ZY, AAA, SML, HC), pp. 543–548.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.