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Travelled to:
1 × Canada
1 × France
1 × Germany
1 × Norway
1 × United Kingdom
2 × Austria
2 × Spain
Collaborated with:
M.P.E.Heimdahl T.Byun C.Bunse D.Kim M.Zhang K.Ogata M.W.Whalen S.Rayadurgam M.Kim Y.Kim H.Kim
Talks about:
model (6) check (6) system (4) constraint (3) softwar (3) test (3) use (3) abstract (2) control (2) specif (2)

Person: Yunja Choi

DBLP DBLP: Choi:Yunja

Contributed to:

SAC 20152015
WRLA 20142014
SEFM 20132013
CBSE 20082008
ICST 20082008
ASE 20042004
ASE 20032003
ASE 20022002
ESEC/FSE 20012001
ASE 20192019

Wrote 10 papers:

SAC-2015-ByunC #automation #constraints #operating system #safety #testing #using
Automated system-level safety testing using constraint patterns for automotive operating systems (TB, YC), pp. 1815–1822.
WRLA-2014-ZhangCO #framework #semantics #standard #𝕂
A Formal Semantics of the OSEK/VDX Standard in 𝕂 Framework and Its Applications (MZ, YC, KO), pp. 280–296.
SEFM-2013-Choi #constraints #generative #operating system #specification #testing
Constraint Specification and Test Generation for OSEK/VDX-Based Operating Systems (YC), pp. 305–319.
CBSE-2008-ChoiB #component #design #towards #verification
Towards Component-Based Design and Verification of a µ-Controller (YC, CB), pp. 196–211.
ICST-2008-KimCKK #model checking
Pre-testing Flash Device Driver through Model Checking Techniques (MK, YC, YK, HK), pp. 475–484.
ASE-2004-ChoiH #approach #case study #model checking
Combination Model Checking: Approach and a Case Study (YC, MPEH), pp. 354–357.
ASE-2003-ChoiH #abstraction #model checking #reduction #requirements #specification #using
Model Checking Software Requirement Specifications using Domain Reduction Abstraction (YC, MPEH), pp. 314–317.
ASE-2002-HeimdahlCW #analysis #model checking
Deviation Analysis Through Model Checking (MPEH, YC, MWW), pp. 37–46.
ESEC-FSE-2001-ChoiRH #abstraction #automation #constraints #model checking
Automatic abstraction for model checking software systems with interrelated numeric constraints (YC, SR, MPEH), pp. 164–174.
ASE-2019-KimC #embedded #model checking #using
Model Checking Embedded Control Software using OS-in-the-Loop CEGAR (DK, YC), pp. 565–576.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.