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Used together with:
signal (7)
circuit (7)
mix (6)
test (5)
digit (5)

Stem analogu$ (all stems)

28 papers:

DATEDATE-2015-SalfelderH #adaptation #evaluation #simulation #using
Ageing simulation of analogue circuits and systems using adaptive transient evaluation (FS, LH), pp. 1261–1264.
DATEDATE-2012-RudolfTWW #automation #configuration management #identification
Automated critical device identification for configurable analogue transistors (RR, PT, RW, PRW), pp. 858–861.
DATEDATE-2011-HashempourDTKHBX #fault #industrial #reduction #testing
Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example (HH, JD, BT, BK, CH, MvB, YX), pp. 371–376.
DATEDATE-2010-KrishnanDBK
Block-level bayesian diagnosis of analogue electronic circuits (SK, KDD, RB, HGK), pp. 1767–1772.
DATEDATE-2010-SchulzBUES #modelling #transaction
Transmitting TLM transactions over analogue wire models (SS, JB, TU, KE, SS), pp. 1608–1613.
DATEDATE-2009-AliKWW #modelling #optimisation #performance
Improved performance and variation modelling for hierarchical-based optimisation of analogue integrated circuits (SA, LK, RW, PRW), pp. 712–717.
DATEDATE-2009-KirchnerBG #simulation #using
Analogue mixed signal simulation using spice and SystemC (TK, NB, CG), pp. 284–287.
DATEDATE-2008-AliWWB #approach #behaviour #modelling #performance
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits (SA, RW, PRW, ADB), pp. 152–157.
DATEDATE-2008-BinkleyGGR #design
From Transistor to PLL — Analogue Design and EDA Methods (DB, HEG, GGEG, JSR).
DATEDATE-2008-ElgertHOHB
DfM in the Analogue and Digital World (CE, VH, AO, TH, EB).
HTHT-2007-schraefel #question #semantics #web #what #why
What is an analogue for the semantic web and why is having one important? (MMCS), pp. 123–132.
DATEDATE-DF-2006-BonfiniCMP #verification
A mixed-signal verification kit for verification of analogue-digital circuits (GB, MC, RM, EP), pp. 88–93.
SIGIRSIGIR-2005-AzzopardiGC #probability
Probabilistic hyperspace analogue to language (LA, MG, MC), pp. 575–576.
DATEDATE-DF-2004-Saul #power management
Low Power Analogue 90 Degree Phase Shifter (PHS), pp. 28–33.
DATEDATE-v1-2004-RolindezMPB #generative #implementation
A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns (LR, SM, GP, AB), pp. 706–707.
DATEDATE-2002-Hoffmann #design #generative #testing
A New Design Flow and Testability Measure for the Generation of a Structural Test and BIST for Analogue and Mixed-Signal Circuits (CH), pp. 197–204.
LICSLICS-2002-DesharnaisJGP #bisimulation #metric #probability #process
The Metric Analogue of Weak Bisimulation for Probabilistic Processes (JD, RJ, VG, PP), pp. 413–422.
DATEDATE-1998-Kazmierski
A Formal Description of VHDL-AMS Analogue Systems (TJK), pp. 916–920.
DATEDATE-1998-Kazmierski98a #interface #simulation
Fuzzy-logic digital-analogue interfaces for accurate mixed-signal simulation (TJK), pp. 941–944.
DATEEDTC-1997-OlbrichGARC #estimation #quality
A new quality estimation methodology for mixed-signal and analogue ICs (TO, IAG, YEA, AMDR, JC), pp. 573–580.
DATEEDTC-1997-WalczowskiNWS #generative #layout #web
Analogue layout generation by World Wide Web server-based agents (LTW, DN, WAJW, KHS), pp. 384–388.
DATEEDAC-1994-AhmadM #automation #layout #named #reasoning
AREAL: Automated Reasoning Expert for Analogue Layout (HHA, RJM), p. 659.
DATEEDAC-1994-ByrneMLD #bibliography #optimisation #using
An Overview of Analogue Optimisation Using “AD-OPT” (EB, OM, DL, BD), pp. 540–545.
DATEEDAC-1994-MoserNAAP #approach #behaviour #modelling #visual notation
A Graphical Approach to Analogue Behavioural Modelling (VM, PN, HPA, LA, FP), pp. 535–539.
VLDBVLDB-1993-SubietaMSR #named
Viewers: A Data-World Analogue of Procedure Calls (KS, FM, JWS, AR), pp. 268–277.
DACDAC-1989-MilsomSCMAS #layout #named #simulation
FACET: A CAE System for RF Analogue Simulation Including Layout (RFM, KJS, SGC, JCM, SA, FNS), pp. 622–625.
DACDAC-1985-Lewis #hardware #simulation
A hardware engine for analogue mode simulation of MOS digital circuits (DML), pp. 345–351.
ICALPICALP-1979-FichB
A Characterization of a Dot-Depth Two Analogue of Generalized Definite Languages (FEF, JAB), pp. 230–244.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.