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chip (7)
power (7)
encod (6)
data (5)
low (4)

Stem buse$ (all stems)

26 papers:

DACDAC-2015-FernandezJAQVC #bound #realtime
Increasing confidence on measurement-based contention bounds for real-time round-robin buses (GF, JJ, JA, EQ, TV, FJC), p. 6.
CHICHI-2015-PritchardVO
Your Money’s No Good Here: The Elimination of Cash Payment on London Buses (GWP, JV, PO), pp. 907–916.
CASECASE-2013-Lajunen #energy
Energy-optimal velocity profiles for electric city buses (AL), pp. 886–891.
ICEISICEIS-J-2012-SilcherDMM12a #lifecycle
Advanced Product Lifecycle Management by Introducing Domain-Specific Service Buses (SS, MD, JM, BM), pp. 92–107.
DATEDATE-2010-KarmarkarT #generative #scalability
Scalable codeword generation for coupled buses (KK, ST), pp. 729–734.
SACSAC-2010-AstrovaKK #comparison #enterprise
Comparison of enterprise service buses based on their support of high availability (IA, AK, TK), pp. 2495–2496.
DATEDATE-2006-SundaresanM #energy #optimisation
Value-based bit ordering for energy optimization of on-chip global signal buses (KS, NRM), pp. 624–625.
HPCAHPCA-2005-SundaresanM #energy #modelling
Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses (KS, NRM), pp. 51–60.
DATEDATE-DF-2004-ElfadelDKRS
A CAD Methodology and Tool for the Characterization of Wide On-Chip Buses (IME, AD, GVK, BR, HS), pp. 144–149.
DATEDATE-v1-2004-KretzschmarNM #power management #why
Why Transition Coding for Power Minimization of On-Chip Buses Does Not Work (CK, AKN, DM), pp. 512–517.
DATEDATE-v2-2004-DuanK
Exploiting Crosstalk to Speed up On-Chip Buse (CD, SPK), pp. 778–783.
HPCAHPCA-2004-WenWPK #predict
Exploiting Prediction to Reduce Power on Buses (VW, MW, YP, JK), pp. 2–13.
DACDAC-2003-GhoneimaI #bidirectional
Optimum positioning of interleaved repeaters In bidirectional buses (MG, YII), pp. 586–591.
DACDAC-2003-RenG #performance
Synthesizing optimal filters for crosstalk-cancellation for high-speed buses (JR, MRG), pp. 592–597.
DATEDATE-2003-LvHLW #encoding
Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address Buses (TL, JH, HL, WW), pp. 10542–10549.
DATEDATE-2002-AghaghiriPF #encoding #multi #power management
EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses (YA, MP, FF), p. 1102.
DATEDATE-2002-BertozziBM #encoding #fault #power management
Low Power Error Resilient Encoding for On-Chip Data Buses (DB, LB, GDM), pp. 102–109.
DATEDATE-2002-LvWHL #adaptation #encoding #taxonomy
An Adaptive Dictionary Encoding Scheme for SOC Data Buses (TL, WW, JH, HL), pp. 1059–1064.
DATEDATE-2002-MacchiaruloMP #energy
Wire Placement for Crosstalk Energy Minimization in Address Buses (LM, EM, MP), pp. 158–162.
DATEDATE-2002-OrtizKG #estimation #power management
Estimation of Power Consumption in Encoded Data Buses (AGO, LDK, MG), p. 1103.
DATEDATE-2000-SuCHCL #metric
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses (CS, YTC, MJH, GNC, CLL), pp. 527–531.
DACDAC-1999-BeniniMMPS #communication #interface #power management #synthesis
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses (LB, AM, EM, MP, RS), pp. 128–133.
DACDAC-1999-PomerleauFB #predict
Improved Selay Prediction for On-Chip Buses (RGP, PDF, GLB), pp. 497–501.
DATEDATE-1999-FornaciariSS #embedded #encoding
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems (WF, DS, CS), pp. 762–763.
SACSAC-1993-PanH #array #composition #pipes and filters
Computation of Singular Value Decomposition on Arrays with Pipelined Optical Buses (YP, MH), pp. 525–532.
DACDAC-1984-PerskyT #multi
Topological routing of multi-bit data buses (GP, LVT), pp. 679–682.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.