6 papers:
ICPR-2014-GotoFNHS- Super-resolution System for 4K-HDTV (TG, TF, FN, SH, MS), pp. 4453–4458.
DATE-2011-VissersNN #interface #realtime #synthesis #tool support #using- Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools (KAV, SN, JN), pp. 848–850.
- DATE-2003-IwasakiNNNYONTOIE #multi #scalability
- Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level (HI, JN, KN, KN, TY, MO, YN, YT, TO, MI, ME), pp. 20002–20007.
- DATE-1999-IkedaKNSYMNO #architecture #scalability #video
- An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture (MI, TK, KN, KS, TY, TM, JN, TO), p. 44–?.
- DATE-1999-OchiaiINEO #embedded #framework #performance #video
- High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit (KO, HI, JN, ME, TO), pp. 303–308.
DAC-1990-MartelloLC #using #verification- Timing Verification Using HDTV (ARM, SPL, DMC), pp. 118–123.
