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Travelled to:
1 × China
1 × Germany
6 × USA
Collaborated with:
K.Roy M.Charikar N.Alon T.N.Vijaykumar H.Li E.Hazan S.Kale R.E.Schapire K.Makarychev Y.Makarychev C.H.Kim S.Mukhopadhyay H.Kaul M.Anders S.Hsu R.Krishnamurthy S.Borkar H.S.Koppula K.P.Leela K.P.Chitrapura S.Garg P.K.GM C.Haty A.Roy A.Sasturkar
Talks about:
cach (3) cut (3) technolog (2) algorithm (2) approxim (2) problem (2) direct (2) design (2) scale (2) min (2)

Person: Amit Agarwal

DBLP DBLP: Agarwal:Amit

Contributed to:

DAC 20122012
CIKM 20092009
STOC 20072007
ICML 20062006
STOC 20052005
DAC 20042004
DATE 20032003
DAC 20022002

Wrote 8 papers:

DAC-2012-KaulAHAKB #challenge #design
Near-threshold voltage (NTV) design: opportunities and challenges (HK, MA, SH, AA, RK, SB), pp. 1153–1158.
CIKM-2009-AgarwalKLCGGHRS #normalisation #web
URL normalization for de-duplication of web pages (AA, HSK, KPL, KPC, SG, PKG, CH, AR, AS), pp. 1987–1990.
STOC-2007-AgarwalAC #approximate #problem
Improved approximation for directed cut problems (AA, NA, MC), pp. 671–680.
ICML-2006-AgarwalHKS #algorithm
Algorithms for portfolio management based on the Newton method (AA, EH, SK, RES), pp. 9–16.
STOC-2005-AgarwalCMM #algorithm #approximate #problem
O(sqrt(log n)) approximation algorithms for min UnCut, min 2CNF deletion, and directed cut problems (AA, MC, KM, YM), pp. 573–581.
DAC-2004-AgarwalKMR #design
Leakage in nano-scale technologies: mechanisms, impact and design considerations (AA, CHK, SM, KR), pp. 6–11.
DATE-2003-AgarwalRV #architecture #pipes and filters
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology (AA, KR, TNV), pp. 10778–10783.
DAC-2002-AgarwalLR #named #power management
DRG-cache: a data retention gated-ground cache for low power (AA, HL, KR), pp. 473–478.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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