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Travelled to:
1 × Germany
2 × France
4 × USA
Collaborated with:

Talks about:
circuit (4) predict (3) model (3) reduct (2) order (2) delay (2) coupl (2) nois (2) use (2) rlc (2)

Person: Bernard N. Sheehan

DBLP DBLP: Sheehan:Bernard_N=

Contributed to:

DAC 20022002
DATE 20022002
DAC 20002000
DATE 20002000
DAC 19991999
DATE 19991999
DAC 19961996

Wrote 7 papers:

DAC-2002-Sheehan #predict
Osculating Thevenin model for predicting delay and slew of capacitively characterized cells (BNS), pp. 866–869.
DATE-2002-Sheehan #library
Library Compatible Ceff for Gate-Level Timing (BNS), pp. 826–830.
DAC-2000-Sheehan #predict
Predicting coupled noise in RC circuits by matching 1, 2, and 3 moments (BNS), pp. 532–535.
DATE-2000-Sheehan #predict
Predicting Coupled Noise in RC Circuits (BNS), pp. 517–521.
DAC-1999-Sheehan #equation #named #order #performance #reduction #using
ENOR: Model Order Reduction of RLC Circuits Using Nodal Equations for Efficient Factorization (BNS), pp. 17–21.
DATE-1999-Sheehan #reduction #using
Projective Convolution: RLC Model-Order Reduction Using the Impulse Response (BNS), p. 669–?.
DAC-1996-Sheehan #performance
An AWE Technique for Fast Printed Circuit Board Delays (BNS), pp. 539–543.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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