Travelled to:1 × Norway
4 × USA
Collaborated with:K.Sohn T.Suh H.S.Lee A.D.Nguyen P.Dubey D.Kim S.Lee J.Chung D.H.Woo S.Yoo S.Lee N.Satish C.Kim J.Chhugani V.W.Lee A.Ghoting G.Buehrer S.Parthasarathy Y.Chen Amirali Boroumand S.Ghose Y.Kim R.Ausavarungnirun Eric Shiu Rahul Thakur Aki Kuusela A.Knies P.Ranganathan O.Mutlu
Talks about:sort (2) cach (2) architectur (1) bottleneck (1) processor (1) heterogen (1) conscious (1) bandwidth (1) workload (1) movement (1)
Person: Daehyun Kim
DBLP: Kim:Daehyun
Contributed to:
2012
2010
20082005
2005
2018Wrote 6 papers:
- DAC-2012-KimLCKWYL #cpu #gpu #hybrid #in memory #memory management
- Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU (DK, SL, JC, DK, DHW, SY, SL), pp. 888–896.
- SIGMOD-2010-SatishKCNLKD #performance
- Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort (NS, CK, JC, ADN, VWL, DK, PD), pp. 351–362.
- ICPR-2008-KimS #consistency #detection #sequence #using #video
- Static text region detection in video sequences using color and orientation consistencies (DK, KS), pp. 1–4.
- DAC-2005-SuhKL #architecture
- Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs (TS, DK, HHSL), pp. 553–558.
- VLDB-2005-GhotingBPKNCD #mining
- Cache-conscious Frequent Pattern Mining on a Modern Processor (AG, GB, SP, DK, ADN, YKC, PD), pp. 577–588.
- ASPLOS-2018-BoroumandGKASTK #data flow
- Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks (AB, SG, YK, RA, ES, RT, DK, AK, AK, PR, OM), pp. 316–331.