BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × Germany
Collaborated with:
R.Weerasekera M.Grange H.Tenhunen
Talks about:
integr (2) interconnect (1) technolog (1) electron (1) silicon (1) circuit (1) signal (1) memori (1) extend (1) applic (1)

Person: Dinesh Pamunuwa

DBLP DBLP: Pamunuwa:Dinesh

Contributed to:

DATE 20102010
DATE 20082008

Wrote 2 papers:

DATE-2010-WeerasekeraGPT #3d #on the
On signalling over Through-Silicon Via (TSV) interconnects in 3-D Integrated Circuits (RW, MG, DP, HT), pp. 1325–1328.
DATE-2008-Pamunuwa #integration #memory management #scalability
Memory Technology for Extended Large-Scale Integration in Future Electronics Applications (DP), pp. 1126–1127.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.