BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
3 × USA
Collaborated with:
D.H.Du J.A.Ludwig K.Eng S.H.Yen
Talks about:
placement (1) dimension (1) construct (1) synthesi (1) synchron (1) perform (1) circuit (1) sensit (1) matrix (1) layout (1)

Person: Ichiang Lin

DBLP DBLP: Lin:Ichiang

Contributed to:

DAC 19921992
DAC 19901990
DAC 19891989

Wrote 3 papers:

Analyzing Cycle Stealing on Synchronous Circuits with Level-Sensitive Latches (IL, JAL, KE), pp. 393–398.
Performance-Driven Constructive Placement (IL, DHCD), pp. 103–106.
DAC-1989-LinDY #2d #layout #matrix #synthesis
Gate Matrix Layout Synthesis with Two-Dimensional Folding (IL, DHCD, SHCY), pp. 37–42.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.