Travelled to:1 × Germany
1 × Italy
1 × Korea
2 × France
3 × USA
Collaborated with:D.Shin S.Lee J.Park S.S.Hahn Y.Kim K.Kwon K.S.Yim K.Koh W.Kim S.L.Min H.Yun S.Moon S.Lee N.Chang T.Kim M.Kim Genhee Cho Yoona Kim Lois Orosa O.Mutlu
Talks about:time (5) system (4) techniqu (3) collect (3) flash (3) base (3) lifetim (2) analysi (2) voltag (2) energi (2)
Person: Jihong Kim
DBLP: Kim:Jihong
Contributed to:
2015
2013
200720052002
200120012001
2020Wrote 9 papers:
- DAC-2015-HahnKL #garbage collection
- To collect or not to collect: just-in-time garbage collection for high-performance SSDs with long lifetimes (SSH, JK, SL), p. 6.
- DATE-2013-LeeKPK #approach
- An integrated approach for managing the lifetime of flash-based SSDs (SL, TK, JP, JK), pp. 1522–1525.
- SAC-2007-KimKK #energy #mobile
- Energy-efficient disk replacement and file placement techniques for mobile systems with hard disks (YJK, KTK, JK), pp. 693–698.
- SAC-2005-YimKK #memory management #performance
- A fast start-up technique for flash memory based computing systems (KSY, JK, KK), pp. 843–849.
- DATE-2002-KimKM #algorithm #analysis #realtime #scalability #using
- A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis (WK, JK, SLM), pp. 788–794.
- CC-2001-YunKM #control flow #pipes and filters #towards
- A First Step Towards Time Optimal Software Pipelining of Loops with Control Flows (HSY, JK, SMM), pp. 182–199.
- DAC-2001-ShinKL #analysis #energy #scheduling #using
- Low-Energy Intra-Task Voltage Scheduling Using Static Timing Analysis (DS, JK, SL), pp. 438–443.
- DATE-2001-ShinKC #optimisation
- An operation rearrangement technique for power optimization in VLIM instruction fetch (DS, JK, NC), p. 809.
- ASPLOS-2020-KimPCKOMK #architecture #named #performance
- Evanesco: Architectural Support for Efficient Data Sanitization in Modern Flash-Based Storage Systems (MK, JP, GC, YK, LO, OM, JK), pp. 1311–1326.