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Travelled to:
1 × France
1 × Germany
3 × USA
Collaborated with:
S.Kang S.Jung C.L.Liu J.Lee U.Narayanan T.Hwang P.Saxena
Talks about:
logic (4) dual (4) threshold (3) synthesi (3) voltag (3) domino (3) power (2) low (2) methodolog (1) transform (1)

Person: Ki-Wook Kim

DBLP DBLP: Kim:Ki=Wook

Contributed to:

DAC 20022002
DATE 20022002
DAC 20012001
DAC 20002000
DATE 19991999

Wrote 6 papers:

DAC-2002-JungKK #logic
Low-swing clock domino logic incorporating dual supply and dual threshold voltages (SOJ, KWK, SMK), pp. 467–472.
DAC-2002-LeeKK #named #verification
VeriCDF: a new verification methodology for charged device failures (JL, KWK, SMK), pp. 874–879.
DATE-2002-JungKK #logic #performance #synthesis
Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain (SOJ, KWK, SMK), pp. 260–265.
DAC-2001-KimJSLK #optimisation #using
Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique (KWK, SOJ, PS, CLL, SMK), pp. 732–737.
DAC-2000-KimNK #logic #synthesis
Domino logic synthesis minimizing crosstalk (KWK, UN, SMK), pp. 280–285.
DATE-1999-KimKHL #logic #power management #synthesis
Logic Transformation for Low Power Synthesis (KWK, SMK, TH, CLL), pp. 158–162.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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