Travelled to:
1 × France
1 × Germany
2 × USA
Collaborated with:
P.R.Panda A.Vishnoi P.Marwedel A.Sahu A.Gangwar A.Kumar
Talks about:
processor (2) debug (2) cach (2) multiprocessor (1) interconnect (1) architectur (1) heterogen (1) synthesi (1) platform (1) compress (1)
Person: M. Balakrishnan
DBLP: Balakrishnan:M=
Contributed to:
Wrote 5 papers:
- DAC-2009-VishnoiPB #debugging #online
- Online cache state dumping for processor debug (AV, PRP, MB), pp. 358–363.
- DATE-2009-SahuBP #concurrent #estimation #framework #multi #performance #thread
- A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors (AS, MB, PRP), pp. 1018–1023.
- DATE-2009-VishnoiPB #debugging
- Cache aware compression for processor debug support (AV, PRP, MB), pp. 208–213.
- DATE-2005-GangwarBPK #architecture #clustering #evaluation
- Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures (AG, MB, PRP, AK), pp. 730–735.
- DAC-1989-BalakrishnanM #approach #design #scheduling #synthesis
- Integrated Scheduling and Binding: A Synthesis Approach for Design Space Exploration (MB, PM), pp. 68–74.