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Travelled to:
1 × France
10 × USA
3 × Germany
Collaborated with:
P.Ienne D.Grissom M.Sarrafzadeh A.K.Verma A.Kaplan H.Parandeh-Afshar Y.O.M.Moctar R.Kastner A.G.Bayrak F.Regazzoni D.Novo J.L.Ayala D.Atienza T.Kluter E.Charbon J.Macbeth A.Nahapetian R.Jafari F.Dabiri M.Stojilovic L.Saranovac F.Standaert Jason Ott Tyson Loveless Christopher Curtis M.Lesani N.Velickovic W.Gong X.Hao F.Brewer
Talks about:
synthesi (3) instruct (3) arithmet (3) circuit (3) system (3) data (3) reconfigur (2) microfluid (2) communic (2) program (2)

Person: Philip Brisk

DBLP DBLP: Brisk:Philip

Contributed to:

DAC 20142014
DAC 20132013
DATE 20132013
DAC 20122012
DATE 20122012
DAC 20112011
DAC 20092009
DATE 20082008
DAC 20072007
DATE 20062006
LCTES 20052005
SAC 20052005
DAC 20042004
DAC 20032003
OOPSLA 20182018

Wrote 18 papers:

DAC-2014-MoctarB #parallel
Parallel FPGA Routing based on the Operator Formulation (YOMM, PB), p. 6.
DAC-2013-GrissomB #programmable
A field-programmable pin-constrained digital microfluidic biochip (DG, PB), p. 9.
An EDA-friendly protection scheme against side-channel attacks (AGB, NV, FR, DN, PB, PI), pp. 410–415.
DAC-2012-GrissomB #scheduling
Path scheduling on digital microfluidic biochips (DG, PB), pp. 26–35.
DATE-2012-StojilovicNSBI #flexibility
Selective flexibility: Breaking the rigidity of datapath merging (MS, DN, LS, PB, PI), pp. 1543–1548.
DAC-2011-BayrakRBSI #analysis #automation #towards
A first step towards automatic application of power analysis countermeasures (AGB, FR, PB, FXS, PI), pp. 230–235.
DAC-2009-AyalaAB #analysis #data flow
Thermal-aware data flow analysis (JLA, DA, PB), pp. 613–614.
DAC-2009-KluterBIC #automation #set
Way Stealing: cache-assisted automatic instruction set extensions (TK, PB, PI, EC), pp. 31–36.
DATE-2008-Parandeh-AfsharBI #integer #linear #programming #synthesis
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming (HPA, PB, PI), pp. 1256–1261.
DATE-2008-VermaBI #design #latency #paradigm
Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design (AKV, PB, PI), pp. 1250–1255.
DAC-2007-BriskVIP #performance
Enhancing FPGA Performance for Arithmetic Circuits (PB, AKV, PI, HPA), pp. 334–337.
DAC-2007-VermaBI #composition #heuristic
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits (AKV, PB, PI), pp. 404–409.
DATE-2006-KastnerGHBKBS #communication #layout #optimisation #synthesis
Layout driven data communication optimization for high level synthesis (RK, WG, XH, FB, AK, PB, MS), pp. 1185–1190.
LCTES-2005-BriskMNS #taxonomy
A dictionary construction technique for code compression systems with echo instructions (PB, JM, AN, MS), pp. 105–114.
SAC-2005-JafariDBS #adaptation #fault tolerance #monitoring
Adaptive and fault tolerant medical vest for life-critical medical monitoring (RJ, FD, PB, MS), pp. 272–279.
DAC-2004-BriskKS #configuration management #design #set #synthesis
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs (PB, AK, MS), pp. 395–400.
DAC-2003-KaplanBK #communication #configuration management #estimation #reduction
Data communication estimation and reduction for reconfigurable systems (AK, PB, RK), pp. 616–621.
OOPSLA-2018-OttLCLB #named #programming
BioScript: programming safe chemistry on laboratories-on-a-chip (JO, TL, CC, ML, PB), p. 31.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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