Travelled to:2 × Germany
3 × USA
Collaborated with:D.Chatterjee V.Bertacco B.M.Al-Hashimi A.Ziv C.Hsu R.Gal A.Koyfman W.Kadry A.Goryachev E.Almog C.A.Krygowski B.Mammo D.Pidan A.Nahir E.Bin A.Ghanayim K.Holtz E.Marcus O.Peled M.Rimon G.Shurek E.Tsanko
Talks about:acceler (3) verif (3) architectur (2) platform (2) instruct (2) hardwar (2) check (2) challeng (1) approxim (1) approach (1)
Person: Ronny Morad
DBLP: Morad:Ronny
Contributed to:
2014
201220122011
2010Wrote 6 papers:
- DATE-2014-HsuCMGB #architecture #named #performance #validation
- ArChiVED: Architectural checking via event digests for high performance validation (CHH, DC, RM, RG, VB), pp. 1–6.
- DAC-2012-ChatterjeeKMZB #architecture #platform
- Checking architectural outputs instruction-by-instruction on acceleration platforms (DC, AK, RM, AZ, VB), pp. 955–961.
- DATE-2012-Al-HashimiM #framework #hardware #platform #question #verification
- Accelerators and emulators: Can they become the platform of choice for hardware verification? (BMAH, RM), p. 430.
- DATE-2012-MammoCPNZMB #approximate #simulation
- Approximating checkers for simulation acceleration (BM, DC, DP, AN, AZ, RM, VB), pp. 153–158.
- DAC-2011-KadryMGAK #approach #challenge #design #effectiveness #verification
- Facing the challenge of new design features: an effective verification approach (WK, RM, AG, EA, CAK), pp. 842–847.
- SEKE-2010-BinGHMMPRST #hardware #ontology #tool support #verification
- Ontology-Based Tools in the Service of Hardware Verification (EB, AG, KH, EM, RM, OP, MR, GS, ET), pp. 303–308.