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Travelled to:
1 × USA
9 × France
9 × Germany
Collaborated with:
N.Nicolici P.Eles T.J.Kazmierski G.V.Merrett P.M.Rosinger M.T.Schmitz L.Wang D.Flynn A.S.Weddell K.Chakrabarty M.Zwolinski P.T.Gonciari S.S.Khursheed R.A.Shafik R.Morad M.Varea M.Boettcher G.Gabrielli S.Hill S.P.Beeby A.Andrei Z.Peng A.Das A.Kumar B.Veeravalli L.Benini P.Harrod B.Mishra D.Zhou M.Lampropoulos P.Oikonomakos D.Wu D.Kershaw J.N.Mistry M.I.Ali J.Recas D.Atienza S.Yang A.Darbari J.Biggs A.Ejlali S.G.Miremadi L.Dilillo P.Girard M.Eyole A.Reid M.Aloufi J.Wenninger D.Zhu R.N.Torah R.A.Shafik J.Kufel P.R.Wilson P.N.Whatmough J.Myers M.Magno D.Brunelli I.N.Ayala-Garcia S.Ogg E.Valli A.Yakovlev C.D'Alessandro
Talks about:
energi (15) system (13) power (10) design (9) harvest (7) embed (7) test (7) base (7) techniqu (5) effici (5)

Person: Bashir M. Al-Hashimi

DBLP DBLP: Al-Hashimi:Bashir_M=

Contributed to:

DATE 20152015
DAC 20142014
DATE 20142014
DATE 20132013
DATE 20122012
DATE 20112011
DATE 20102010
DATE 20092009
DATE 20082008
DATE 20072007
DATE 20062006
DATE 20052005
DATE v1 20042004
DATE v2 20042004
DATE 20032003
DATE 20022002
DATE 20012001
DATE 20002000
DATE 19991999

Wrote 38 papers:

DATE-2015-0001KVSMA #adaptation #embedded #energy #nondeterminism #scalability
Workload uncertainty characterization and adaptive frequency scaling for energy minimization of embedded systems (AD, AK, BV, RAS, GVM, BMAH), pp. 43–48.
DAC-2014-0001SMAKV #manycore #optimisation
Reinforcement Learning-Based Inter- and Intra-Application Thermal Optimization for Lifetime Improvement of Multicore Systems (AD, RAS, GVM, BMAH, AK, BV), p. 6.
DATE-2014-BoettcherAEGR #architecture
Advanced SIMD: Extending the reach of contemporary SIMD architectures (MB, BMAH, ME, GG, AR), pp. 1–4.
DATE-2014-KufelWHAWM #embedded
Clock-modulation based watermark for protection of embedded processors (JK, PRW, SH, BMAH, PNW, JM), pp. 1–6.
DATE-2013-BoettcherGAK #energy #multi #named
MALEC: a multiple access low energy cache (MB, GG, BMAH, DK), pp. 368–373.
DATE-2013-KazmierskiWAM #energy #optimisation #performance
DoE-based performance optimization of energy management in sensor nodes powered by tunable energy-harvesters (TJK, LW, BMAH, GVM), p. 484.
DATE-2013-WeddellMMBAB #energy #multi #overview
A survey of multi-source energy harvesting systems (ASW, MM, GVM, DB, BMAH, LB), pp. 905–908.
DATE-2012-Al-HashimiM #framework #hardware #platform #question #verification
Accelerators and emulators: Can they become the platform of choice for hardware verification? (BMAH, RM), p. 430.
DATE-2012-WangKAAW #design #energy #optimisation
Response-surface-based design space exploration and optimisation of wireless sensor nodes with tunable energy harvesters (LW, TJK, BMAH, MA, JW), pp. 733–738.
DATE-2011-MistryAFH #power management
Sub-clock power-gating technique for minimising leakage power during active mode (JNM, BMAH, DF, SH), pp. 106–111.
DATE-2011-WangKAWMA #energy #simulation #using
Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique (LW, TJK, BMAH, ASW, GVM, INAG), pp. 1267–1272.
DATE-2011-WeddellMA #power management
Ultra low-power photovoltaic MPPT technique for indoor and outdoor wireless sensor nodes (ASW, GVM, BMAH), pp. 905–908.
DATE-2010-AliARA #algorithm #design #energy #evaluation #predict
Evaluation and design exploration of solar harvested-energy prediction algorithm (MIA, BMAH, JR, DA), pp. 142–147.
DATE-2010-ShafikAC #design #embedded #optimisation #power management
Soft error-aware design optimization of low power and time-constrained embedded systems (RAS, BMAH, KC), pp. 1462–1467.
DATE-2010-YangAFK #design #power management #reliability
Scan based methodology for reliable state retention power gating designs (SY, BMAH, DF, SSK), pp. 69–74.
DATE-2009-DarbariAFB #design #simulation #using
Selective state retention design using symbolic simulation (AD, BMAH, DF, JB), pp. 1644–1649.
DATE-2009-KhursheedAH #design #fault #multi #reduction
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing (SSK, BMAH, PH), pp. 1349–1354.
DATE-2009-MishraAZ #adaptation
Variation resilient adaptive controller for subthreshold circuits (BM, BMAH, MZ), pp. 142–147.
DATE-2009-WangKABZ #automation #design #energy
An automated design flow for vibration-based energy harvester systems (LW, TJK, BMAH, SPB, DZ), pp. 1391–1396.
DATE-2008-KazmierskiZA #approximate #mobile #modelling #performance #using
Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density (TJK, DZ, BMAH), pp. 146–151.
DATE-2008-OggVAYDB
Serialized Asynchronous Links for NoC (SO, EV, BMAH, AY, CD, LB), pp. 1003–1008.
DATE-2008-WangKABT #approach #energy #modelling #optimisation #performance
Integrated approach to energy harvester mixed technology modelling and performance optimisation (LW, TJK, BMAH, SPB, RNT), pp. 704–709.
DATE-2007-EjlaliARM #energy #fault tolerance #network #performance
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks (AE, BMAH, PMR, SGM), pp. 1647–1652.
DATE-2006-DililloRAG #process #reduction
Minimizing test power in SRAM through reduction of pre-charge activity (LD, PMR, BMAH, PG), pp. 1159–1164.
DATE-2005-AndreiSEPH #constraints #energy #scalability
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints (AA, MTS, PE, ZP, BMAH), pp. 514–519.
DATE-2005-RosingerAC #agile #generative
Rapid Generation of Thermal-Safe Test Schedules (PMR, BMAH, KC), pp. 840–845.
DATE-v1-2004-AndreiSEPA #energy #reduction
Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems (AA, MTS, PE, ZP, BMAH), pp. 518–525.
DATE-v2-2004-LampropoulosAR #using
Minimization of Crosstalk Noise, Delay and Power Using a Modified Bus Invert Technique (ML, BMAH, PMR), pp. 1372–1373.
DATE-2003-GonciariAN #perspective #testing
Test Data Compression: The System Integrator’s Perspective (PTG, BMAH, NN), pp. 10726–10731.
DATE-2003-OikonomakosZA #metric #online #self #synthesis #testing #using
Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric (PO, MZ, BMAH), pp. 10596–10601.
DATE-2003-SchmitzAE #co-evolution #design #embedded #energy #execution #multi
A Co-Design Methodology for Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities (MTS, BMAH, PE), pp. 10960–10965.
DATE-2003-WuAE #embedded #graph #power management #scheduling #synthesis
Scheduling and Mapping of Conditional Task Graphs for the Synthesis of Low Power Embedded Systems (DW, BMAH, PE), pp. 10090–10095.
DATE-2002-GonciariAN #testing
Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-a-Chip Test Data Compression/Decompression (PTG, BMAH, NN), pp. 604–611.
DATE-2002-SchmitzAE #distributed #embedded #energy #scheduling
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems (MTS, BMAH, PE), pp. 514–521.
DATE-2001-NicoliciA #3d #design #testing #trade-off
Testability trade-offs for BIST RTL data paths: the case for three dimensional design space (NN, BMAH), p. 802.
DATE-2001-VareaA #embedded #modelling #petri net #specification
Dual transitions petri net based modelling technique for embedded systems specification (MV, BMAH), pp. 566–571.
DATE-2000-NicoliciA #clustering #multi #power management
Scan Latch Partitioning into Multiple Scan Chains for Power Minimization in Full Scan Sequential Circuits (NN, BMAH), pp. 715–722.
DATE-1999-NicoliciA #hardware #performance
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths (NN, BMAH), p. 289–?.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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