Travelled to:
1 × Denmark
1 × France
1 × New Zealand
1 × The Netherlands
3 × USA
Collaborated with:
O.Sentieys B.Combemale M.Alle A.Morvan R.B.France C.Guy V.D.Tovinakere M.A.Pasha W.Sun A.Floch T.Yuki J.Steel J.Jézéquel S.V.Rajopadhye A.E.Moussawi K.Martin M.Naullet L.L'Hours N.Simon F.Charot C.Wolinski
Talks about:
model (5) design (2) power (2) flow (2) architectur (1) substitut (1) semiempir (1) framework (1) synthesi (1) prototyp (1)
Person: Steven Derrien
DBLP: Derrien:Steven
Contributed to:
Wrote 7 papers:
- DAC-2013-AlleMD #analysis #dependence #pipes and filters #runtime #synthesis
- Runtime dependency analysis for loop pipelining in high-level synthesis (MA, AM, SD), p. 10.
- ECMFA-2013-SunCDF #using
- Using Model Types to Support Contract-Aware Model Substitutability (WS, BC, SD, RBF), pp. 118–133.
- SCAM-2013-FlochYMMMNALSDCWS #design #framework #hardware #named #prototype
- GeCoS: A framework for prototyping custom hardware design flows (AF, TY, AEM, AM, KM, MN, MA, LL, NS, SD, FC, CW, OS), pp. 100–105.
- DAC-2012-TovinakereSD #clustering #estimation #logic
- A semiempirical model for wakeup time estimation in power-gated logic clusters (VDT, OS, SD), pp. 48–55.
- ECMFA-2012-GuyCDSJ #on the #type system
- On Model Subtyping (CG, BC, SD, JS, JMJ), pp. 400–415.
- MoDELS-2011-FlochYGDCRF #compilation #modelling #optimisation #question
- Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far? (AF, TY, CG, SD, BC, SVR, RBF), pp. 608–622.
- DAC-2010-PashaDS #architecture #generative #power management
- A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking (MAP, SD, OS), pp. 693–698.