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Used together with:
time (9)
network (6)
base (4)
multipl (4)
communic (4)

Stem multiplex$ (all stems)

31 papers:

DACDAC-2015-JungC #embedded #multi #named #performance #simulation
ΣVP: host-GPU multiplexing for efficient simulation of multiple embedded GPUs on virtual platforms (YJ, LPC), p. 6.
DATEDATE-2014-AksoyFM #complexity #constant #design #multi #optimisation
Optimization of design complexity in time-multiplexed constant multiplications (LA, PFF, JCM), pp. 1–4.
DATEDATE-2014-LongLY #analysis #bound #evaluation #modelling #multi
Analysis and evaluation of per-flow delay bound for multiplexing models (YL, ZL, XY), pp. 1–4.
DATEDATE-2014-VartziotisKCPJ #multi #optimisation #using
Multi-site test optimization for multi-Vdd SoCs using space- and time- division multiplexing (FV, XK, KC, RAP, AJ), pp. 1–6.
DATEDATE-2014-ZebeleinHFST #communication #modelling #multi #protocol
Model-based actor multiplexing with application to complex communication protocols (CZ, CH, JF, TS, JT), pp. 1–4.
DACDAC-2013-DinakarraoWY #3d #multi #reduction
Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor (SMPD, KW, HY), p. 6.
DATEDATE-2013-DimitrakopoulosGNK #multi
Switch folding: network-on-chip routers with time-multiplexed output ports (GD, NG, CN, EK), pp. 344–349.
DACDAC-2012-YorkC #multi #on the
On the asymptotic costs of multiplexer-based reconfigurability (JY, DC), pp. 790–795.
DATEDATE-2012-DimitrakopoulosK #metaprogramming #multi #network
Dynamic-priority arbiter and multiplexer soft macros for on-chip networks switches (GD, EK), pp. 542–545.
DATEDATE-2011-LiuX #debugging #multi #on the
On multiplexed signal tracing for post-silicon debug (XL, QX), pp. 685–690.
HPCAHPCA-2011-PellauerAKPE #manycore #named #simulation #using
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing (MP, MA, MAK, AP, JSE), pp. 406–417.
DATEDATE-2010-SubramanyanSSL #execution #fault tolerance #multi #performance
Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors (PS, VS, KKS, EL), pp. 1572–1577.
HCIHIMI-IIE-2007-YajimaWS #evaluation #information management #multi
Evaluation of the Participant-Support Method for Information Acquisition in the “Multiplex Risk Communicator” (HY, TW, RS), pp. 195–203.
DACDAC-2005-MetzgenN #implementation #multi #reduction
Multiplexer restructuring for FPGA implementation cost reduction (PM, DN), pp. 421–426.
ICTSSTestCom-2005-CampbellVHP #multi #order
Multiplexing of Partially Ordered Events (CC, MV, JH, AP), pp. 97–110.
DACDAC-2004-TummeltshammerHP #constant #multi
Multiple constant multiplication by time-multiplexed mapping of addition chains (PT, JCH, MP), pp. 826–829.
DATEDATE-v1-2004-NagariN #algorithm #multi
A 2.7V 350muW 11-b Algorithmic Analog-to-Digital Converter with Single-Ended Multiplexed Inputs (AN, GN), pp. 76–81.
VLDBVLDB-2004-MacNicolF #multi
Sybase IQ Multiplex — Designed For Analytics (RM, BF), pp. 1227–1230.
DATEDATE-2003-EbadiI #comparison #implementation #multi
Time Domain Multiplexed TAM: Implementation and Comparison (ZSE, AI), pp. 10732–10737.
DATEDATE-2002-AghaghiriPF #encoding #multi #power management
EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses (YA, MP, FF), p. 1102.
DATEDATE-2000-SchollB #generative #logic #multi #on the
On the Generation of Multiplexer Circuits for Pass Transistor Logic (CS, BB), pp. 372–378.
HPCAHPCA-1998-BasuT #memory management #multi
Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma (SB, JT), pp. 152–161.
DATEEDTC-1997-RiescoDMCSJ #multi #network #on the
On the way to the 2.5 Gbits/s ATM network ATM multiplexer demultiplexer ASIC (JR, JCD, LAM, JLC, CS, EJM), pp. 218–222.
CHICHI-1997-FitzmauriceB #empirical #evaluation #multi #towards #user interface
An Empirical Evaluation of Graspable User Interfaces: Towards Specialized, Space-Multiplexed Input (GWF, WB), pp. 43–50.
HPCAHPCA-1997-YuanMG #algorithm #distributed #multi #network
Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Networks (XY, RGM, RG), pp. 38–47.
DACDAC-1996-ThakurWK #composition #multi
Delay Minimal Decomposition of Multiplexers in Technology Mapping (ST, DFW, SK), pp. 254–257.
HPCAHPCA-1996-QiaoM #multi #network #on the #permutation
On the Multiplexing Degree Required to Embed Permutations in a Class of Networks with Direct Interconnects (CQ, YM), pp. 118–129.
HPCAHPCA-1995-QiaoM #communication #latency #multi
Reducing Communication Latency with Path Multiplexing in Optically Interconnected Multiprocessor Systems (CQ, RGM), pp. 34–43.
HPDCHPDC-1995-LiebeherrW #multi #network
A Versatile Packet Multiplexer for Quality-of-Service Networks (JL, DEW), pp. 148–155.
DATEEDAC-1994-SchoofsGM #architecture #design #multi #optimisation
Signal Type Optimisation in the Design of Time-Multiplexed DSP Architectures (KS, GG, HDM), pp. 502–506.
STOCSTOC-1983-Iwama #communication #multi #string
Unique Decomposability of Shuffled Strings: A Formal Treatment of Asynchronous Time-Multiplexed Communication (KI), pp. 374–381.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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