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Travelled to:
1 × USA
Collaborated with:
T.Xanthopoulos A.Chandrakasan
Talks about:
architectur (1) verilog (1) explor (1) studi (1) power (1) estim (1) idct (1) case (1) base (1) use (1)

Person: Yoshifumi Yaoi

DBLP DBLP: Yaoi:Yoshifumi

Contributed to:

DAC 19971997

Wrote 1 papers:

DAC-1997-XanthopoulosYC #architecture #case study #estimation #using
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT (TX, YY, AC), pp. 415–420.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.