Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients
DAC, 2002.
@inproceedings{DAC-2002-BadarogluTDWMVG,
author = "Mustafa Badaroglu and Kris Tiri and Stéphane Donnay and Piet Wambacq and Hugo De Man and Ingrid Verbauwhede and Georges G. E. Gielen",
booktitle = "{Proceedings of the 39th Design Automation Conference}",
doi = "10.1145/513918.514021",
isbn = "1-58113-461-4",
pages = "399--404",
publisher = "{ACM}",
title = "{Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients}",
year = 2002,
}