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Travelled to:
1 × Austria
1 × Estonia
1 × Germany
1 × India
1 × Italy
1 × Portugal
1 × Spain
2 × France
2 × United Kingdom
3 × USA
Collaborated with:
P.A.Abdulla M.F.Atig Y.Chen G.Delzanno L.Holík C.Leonardsson P.Ganty N.B.Henda P.Rümmer F.Haziza A.Bouajjani J.Stenman Z.Ganjei P.Eles Z.Peng A.Legay J.d'Orso S.Dwarkadas A.Shriraman Y.Zhu B.Jonsson C.Dragoi C.Enea M.Sighireanu J.Cederberg Bui Phi Diep
Talks about:
verif (5) parameter (4) abstract (4) constraint (3) program (3) string (3) insert (3) fenc (3) transduc (2) process (2)

Person: Ahmed Rezine

DBLP DBLP: Rezine:Ahmed

Contributed to:

CAV 20152015
VMCAI 20152015
CAV 20142014
LATA 20142014
DATE 20132013
TACAS 20132013
SAS 20122012
TACAS 20122012
CAV 20102010
CAV 20082008
VMCAI 20082008
CAV 20072007
TACAS 20072007
TACAS 20052005
PLDI 20172017

Wrote 16 papers:

CAV-2015-AbdullaACHRRS #constraints #named #smt #string
Norn: An SMT Solver for String Constraints (PAA, MFA, YFC, LH, AR, PR, JS), pp. 462–469.
VMCAI-2015-GanjeiREP #process
Abstracting and Counting Synchronizing Processes (ZG, AR, PE, ZP), pp. 227–244.
CAV-2014-AbdullaACHRRS #constraints #string #verification
String Constraints for Verification (PAA, MFA, YFC, LH, AR, PR, JS), pp. 150–166.
LATA-2014-GantyR #order #verification
Ordered Counter-Abstraction — Refinable Subword Relations for Parameterized Verification (PG, AR), pp. 396–408.
DATE-2013-AbdullaDRSZ #hybrid #liveness #memory management #safety #transaction #verification
Verifying safety and liveness for the FlexTM hybrid transactional memory (PAA, SD, AR, AS, YZ), pp. 785–790.
TACAS-2013-AbdullaACLR #automation #precise
Memorax, a Precise and Sound Tool for Automatic Fence Insertion under TSO (PAA, MFA, YFC, CL, AR), pp. 530–536.
TACAS-2013-AbdullaHHJR #concurrent #data type #specification #verification
An Integrated Specification and Verification Technique for Highly Concurrent Data Structures (PAA, FH, LH, BJ, AR), pp. 324–338.
SAS-2012-AbdullaACLR #abstraction #automation #integer #source code
Automatic Fence Insertion in Integer Programs via Predicate Abstraction (PAA, MFA, YFC, CL, AR), pp. 164–180.
Counter-Example Guided Fence Insertion under TSO (PAA, MFA, YFC, CL, AR), pp. 204–219.
CAV-2010-BouajjaniDERS #bound #invariant #source code #synthesis
Invariant Synthesis for Programs Manipulating Lists with Unbounded Data (AB, CD, CE, AR, MS), pp. 72–88.
CAV-2008-AbdullaBCHR #abstraction #memory management #source code
Monotonic Abstraction for Programs with Dynamic Memory Heaps (PAA, AB, JC, FH, AR), pp. 341–354.
Handling Parameterized Systems with Non-atomic Global Conditions (PAA, NBH, GD, AR), pp. 22–36.
CAV-2007-AbdullaDR #infinity #process #verification
Parameterized Verification of Infinite-State Processes with Global Conditions (PAA, GD, AR), pp. 145–157.
TACAS-2007-AbdullaDHR #model checking #performance #transducer #verification
Regular Model Checking Without Transducers (On Efficient Verification of Parameterized Systems) (PAA, GD, NBH, AR), pp. 721–736.
TACAS-2005-AbdullaLdR #transducer
Simulation-Based Iteration of Tree Transducers (PAA, AL, Jd, AR), pp. 30–44.
PLDI-2017-AbdullaACDHRR #analysis #constraints #framework #performance #string
Flatten and conquer: a framework for efficient analysis of string constraints (PAA, MFA, YFC, BPD, LH, AR, PR), pp. 602–617.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.