Travelled to:1 × India
1 × Mexico
5 × USA
Collaborated with:A.D.Hilton G.S.Sohi M.L.Corliss E.C.Lewis S.Nagarakatte A.Moshovos S.J.Battle M.Hempstead
Talks about:toler (2) order (2) dynam (2) dise (2) data (2) multithread (1) instrument (1) decompress (1) processor (1) implement (1)
Person: Amir Roth
DBLP: Roth:Amir
Contributed to:
2012201020092005
20032001
1998Wrote 7 papers:
- HPCA-2012-BattleHHR #flexibility #using
- Flexible register management using reference counting (SJB, ADH, MH, AR), pp. 273–284.
- HPCA-2010-HiltonR #energy #execution #named
- BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution (ADH, AR), pp. 1–12.
- HPCA-2009-HiltonNR #named
- iCFP: Tolerating all-level cache misses in in-order processors (ADH, SN, AR), pp. 431–442.
- HPCA-2005-CorlissLR #debugging #interactive
- Low-Overhead Interactive Debugging via Dynamic Instrumentation with DISE (MLC, ECL, AR), pp. 303–314.
- LCTES-2003-CorlissLR #implementation
- A DISE implementation of dynamic code decompression (MLC, ECL, AR), pp. 232–243.
- HPCA-2001-RothS #data-driven #multi #thread
- Speculative Data-Driven Multithreading (AR, GSS), pp. 37–48.
- ASPLOS-1998-RothMS #data type #linked data #open data
- Dependance Based Prefetching for Linked Data Structures (AR, AM, GSS), pp. 115–126.