BibSLEIGH — Proceedings of the 15th International Conference on High-Performance Computer Architecture

Proceedings of the 15th International Conference on High-Performance Computer Architecture
HPCA, 2009.

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@proceedings{HPCA-2009,
	address       = "Raleigh, North Carolina, USA",
	ee            = "http://www.computer.org/csdl/proceedings/hpca/2009/2932/00/index.html",
	isbn          = "978-1-4244-2932-5",
	publisher     = "{IEEE Computer Society}",
	title         = "{Proceedings of the 15th International Conference on High-Performance Computer Architecture}",
	year          = 2009,
}

Contents (38 items)

HPCA-2009-Banerjee #framework: An intelligent IT infrastructure for the future (PB), pp. 3–4.
HPCA-2009-EbrahimiMP #data type #hybrid #linked data #open data: Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems (EE, OM, YNP), pp. 7–17.
HPCA-2009-ReddiGHWSB #predict #using: Voltage emergency prediction: Using signatures to reduce operating margins (VJR, MSG, GHH, GYW, MDS, DMB), pp. 18–29.
HPCA-2009-XuDZZZY #3d #design #network: A low-radix and low-diameter 3D interconnection network design (YX, YD, BZ, XZ, YZ, JY), pp. 30–42.
HPCA-2009-Qureshi #adaptation #robust: Adaptive Spill-Receive for robust high-performance caching in CMPs (MKQ), pp. 45–54.
HPCA-2009-SeoLS #design #implementation #memory management #multi: Design and implementation of software-managed caches for multicores with local memory (SS, JL, ZS), pp. 55–66.
HPCA-2009-AgarwalPJ: In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects (NA, LSP, NKJ), pp. 67–78.
HPCA-2009-WenischFAFM #memory management #metadata #streaming: Practical off-chip meta-data for temporal memory streaming (TFW, MF, AA, BF, AM), pp. 79–90.
HPCA-2009-FuLF #fault #process: Soft error vulnerability aware process variation mitigation (XF, TL, JABF), pp. 93–104.
HPCA-2009-LiRKHA #architecture #fault #hardware #modelling: Accurate microarchitecture-level fault modeling for studying hardware faults (MLL, PR, URK, SKSH, SVA), pp. 105–116.
HPCA-2009-SridharanK #architecture #dependence: Eliminating microarchitectural dependency from Architectural Vulnerability (VS, DRK), pp. 117–128.
HPCA-2009-DuanLP #architecture #estimation #metric #performance #predict: Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics (LD, BL, LP), pp. 129–140.
HPCA-2009-Hill: Opportunities beyond single-core microprocessors (MDH), pp. 143–144.
HPCA-2009-Patt #interface #manycore: Multi-core demands multi-interfaces (YNP), pp. 147–148.
HPCA-2009-MichelogiannakisBD #network: Elastic-buffer flow control for on-chip networks (GM, JDB, WJD), pp. 151–162.
HPCA-2009-GrotHKM: Express Cube Topologies for on-Chip Interconnects (BG, JH, SWK, OM), pp. 163–174.
HPCA-2009-DasEMVD #design #evaluation: Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs (RD, SE, AKM, NV, CRD), pp. 175–186.
HPCA-2009-Najaf-abadiR #architecture: Architectural Contesting (HHNa, ER), pp. 189–200.
HPCA-2009-StephensonZR #lightweight #order: Lightweight predication support for out of order processors (MS, LZ, RR), pp. 201–212.
HPCA-2009-GreskampWKCTCZ #design #named: Blueshift: Designing processors for timing speculation from the ground up (BG, LW, URK, JJC, JT, DC, CBZ), pp. 213–224.
HPCA-2009-Chaudhuri #locality #multi #named #policy #scalability: PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches (MC), pp. 227–238.
HPCA-2009-SunDXLC #3d #architecture #novel: A novel architecture of the 3D stacked MRAM L2 cache for CMPs (GS, XD, YX, JL, YC), pp. 239–249.
HPCA-2009-AwasthiSBC #capacity #scalability: Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches (MA, KS, RB, JBC), pp. 250–261.
HPCA-2009-MadanZMUBIMN #3d #capacity #communication #configuration management #optimisation: Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy (NM, LZ, NM, ANU, RB, RI, SM, DN), pp. 262–274.
HPCA-2009-YehiaGBT #flexibility: Reconciling specialization and flexibility through compound circuits (SY, SG, HB, OT), pp. 277–288.
HPCA-2009-PowellBEMSY #named #parametricity #runtime #using: CAMP: A technique to estimate per-structure power at run-time using a few simple parameters (MDP, AB, JSE, SSM, BRS, SMY), pp. 289–300.
HPCA-2009-HerbertM #scalability: Variation-aware dynamic voltage/frequency scaling (SH, DM), pp. 301–312.
HPCA-2009-FanKDM #programmable: Bridging the computation gap between programmable processors and hardwired accelerators (KF, MK, GSD, SAM), pp. 313–322.
HPCA-2009-ChenA #fine-grained #first-order #parallel #thread #throughput: A first-order fine-grained multithreaded throughput model (XEC, TMA), pp. 329–340.
HPCA-2009-KumarHM #manycore: Characterization of Direct Cache Access on multi-core systems and 10GbE (AK, RH, SM), pp. 341–352.
HPCA-2009-FidalgoVM #adaptation #multi #named #network: MRR: Enabling fully adaptive multicast routing for CMP interconnection networks (PAF, VP, JÁG), pp. 355–366.
HPCA-2009-MatsutaniKAY #architecture #latency #predict: Prediction router: Yet another low latency on-chip router architecture (HM, MK, HA, TY), pp. 367–378.
HPCA-2009-ChenLHCSWP #consistency #memory management #performance #verification: Fast complete memory consistency verification (YC, YL, WH, TC, HS, PW, HP), pp. 381–392.
HPCA-2009-KongASZ: Hardware-software integrated approaches to defend against software cache-based side channel attacks (JK, OA, JPS, HZ), pp. 393–404.
HPCA-2009-DeOrioWB #design #manycore #memory management #named #validation: Dacota: Post-silicon validation of the memory subsystem in multi-core designs (AD, IW, VB), pp. 405–416.
HPCA-2009-SubramaniamBWL #optimisation #performance: Criticality-based optimizations for efficient load processing (SS, AB, HW, GHL), pp. 419–430.
HPCA-2009-HiltonNR #named: iCFP: Tolerating all-level cache misses in in-order processors (ADH, SN, AR), pp. 431–442.
HPCA-2009-HurL #feedback #memory management #probability: Feedback mechanisms for improving probabilistic memory prefetching (IH, CL), pp. 443–454.

Proceedings of the 15th International Conference on High-Performance Computer ArchitectureHPCA, 2009.

Contents (38 items)

Proceedings of the 15th International Conference on High-Performance Computer Architecture
HPCA, 2009.