BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
1 × Germany
3 × USA
Collaborated with:
S.Kumar P.Pujara K.H.Randall S.Ghose L.Gilgeous P.Dudnik C.Waxman
Talks about:
perform (2) detect (2) cach (2) microprocessor (1) architectur (1) techniqu (1) prefetch (1) overhead (1) instruct (1) support (1)

Person: Aneesh Aggarwal

DBLP DBLP: Aggarwal:Aneesh

Contributed to:

DATE 20092009
HPCA 20082008
HPCA 20062006
ISMM 20022002
PLDI 20012001

Wrote 6 papers:

DATE-2009-GhoseGDAW #architecture #detection #memory management
Architectural support for low overhead detection of memory violations (SG, LG, PD, AA, CW), pp. 652–657.
HPCA-2008-KumarA #trade-off #validation
Speculative instruction validation for performance-reliability trade-off (SK, AA), pp. 405–414.
HPCA-2006-KumarA #concurrent #detection #fault #performance
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors (SK, AA), pp. 212–221.
HPCA-2006-PujaraA #performance
Increasing the cache efficiency by eliminating noise (PP, AA), pp. 145–154.
Software caching vs. prefetching (AA), pp. 263–268.
PLDI-2001-AggarwalR #analysis
Related Field Analysis (AA, KHR), pp. 214–220.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.