Travelled to:1 × France
1 × Germany
Collaborated with:D.d.Jonghe E.Maricau G.G.E.Gielen T.McConaghy H.D.Stratigopoulos H.Hashempour J.Dohmen B.Kruseman C.Hora M.v.Beurden Y.Xing
Talks about:test (3) industri (1) analogu (1) variat (1) signal (1) reduct (1) orient (1) exampl (1) defect (1) analog (1)
Person: Bratislav Tasic
DBLP: Tasic:Bratislav
Contributed to:
20122011Wrote 2 papers:
- DATE-2012-JongheMGMTS #modelling #roadmap #testing #verification
- Advances in variation-aware modeling, verification, and testing of analog ICs (DdJ, EM, GGEG, TM, BT, HGDS), pp. 1615–1620.
- DATE-2011-HashempourDTKHBX #fault #industrial #reduction #testing
- Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example (HH, JD, BT, BK, CH, MvB, YX), pp. 371–376.