Travelled to:2 × USA
Collaborated with:C.Cheng T.Y.Lin M.Chang S.Chang W.Jone Y.Kang S.Shieh J.Wang
Talks about:voltag (2) suppli (2) design (2) dual (2) algorithm (1) techniqu (1) support (1) multipl (1) general (1) exploit (1)
Person: Ching-Wei Yeh
DBLP: Yeh:Ching=Wei
Contributed to:
19991991Wrote 3 papers:
- DAC-1999-YehCCJ #design
- Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications (CWY, MCC, SCC, WBJ), pp. 68–71.
- DAC-1999-YehKSW #design #layout #using
- Layout Techniques Supporting the Use of Dual Supply Voltages for Cell-based Designs (CWY, YSK, SJS, JSW), pp. 62–67.
- DAC-1991-YehCL #algorithm #clustering #multi
- A General Purpose Multiple Way Partitioning Algorithm (CWY, CKC, TTYL), pp. 421–426.