Travelled to:3 × USA
Collaborated with:W.Liu S.Ong T.N.Mudge R.A.Rutenbar R.M.Lougheed
Talks about:techniqu (1) overview (1) cellular (1) arithmet (1) process (1) circuit (1) system (1) layout (1) design (1) valid (1)
Person: Daniel E. Atkins
DBLP: Atkins:Daniel_E=
Contributed to:
198319821981Wrote 3 papers:
- DAC-1983-LiuA #bound
- Bounds on the saved area ratio due to PLA folding (WL, DEA), pp. 538–544.
- DAC-1982-MudgeRLA #image #layout #validation
- Cellular image processing techniques for VLSI circuit layout validation and routing (TNM, RAR, RML, DEA), pp. 537–543.
- DAC-1981-AtkinsLO #design #overview
- Overview of an Arithmetic Design System (DEA, WL, SO), pp. 314–321.