BibSLEIGH corpus
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Open Knowledge
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Travelled to:
1 × France
2 × USA
Collaborated with:
H.E.Graeb U.Schlichtmann J.Zou G.Stehr
Talks about:
analog (2) determinist (1) methodolog (1) sequenti (1) hierarch (1) approach (1) quadrat (1) program (1) perform (1) circuit (1)

Person: Daniel Mueller

DBLP DBLP: Mueller:Daniel

Contributed to:

DATE 20072007
DAC 20062006
DAC 20052005

Wrote 3 papers:

DATE-2007-MuellerGS #design #polynomial #programming #trade-off #using
Trade-off design of analog circuits using goal attainment and “Wave Front” sequential quadratic programming (DM, HEG, US), pp. 75–80.
DAC-2006-ZouMGS #optimisation
A CPPLL hierarchical optimization methodology considering jitter, power and locking time (JZ, DM, HEG, US), pp. 19–24.
DAC-2005-MuellerSGS #performance
Deterministic approaches to analog performance space exploration (PSE) (DM, GS, HEG, US), pp. 869–874.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.