Travelled to:
2 × USA
Collaborated with:
D.Mukhopadhyay M.Izumi J.Takahashi X.Wang W.Yueh S.Narasimhan Y.Zheng S.Mukhopadhyay S.Bhunia
Talks about:
power (2) grid (2) strategi (1) multipli (1) multipl (1) channel (1) acceler (1) effici (1) design (1) attack (1)
Person: Debapriya Basu Roy
DBLP: Roy:Debapriya_Basu
Contributed to:
Wrote 2 papers:
- DAC-2014-RoyMIT #multi #performance
- Tile Before Multiplication: An Efficient Strategy to Optimize DSP Multiplier for Accelerating Prime Field ECC for NIST Curves (DBR, DM, MI, JT), p. 6.
- DAC-2013-WangYRNZMMB #design #grid #power management
- Role of power grid in side channel attack and power-grid-aware secure design (XW, WY, DBR, SN, YZ, SM, DM, SB), p. 9.