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Travelled to:
1 × Germany
Collaborated with:
Z.Al-Ars A.J.v.d.Goor J.Braun
Talks about:
stress (1) electr (1) defect (1) simul (1) optim (1) test (1) dram (1) cell (1) use (1)

Person: Detlev Richter

DBLP DBLP: Richter:Detlev

Contributed to:

DATE 20032003

Wrote 1 papers:

DATE-2003-Al-ArsGBR #fault #optimisation #simulation #testing #using
Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation (ZAA, AJvdG, JB, DR), pp. 10484–10489.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.