Travelled to:5 × France
6 × Germany
Collaborated with:Z.Al-Ars S.Hamdioui I.Schanstra G.Gaydadjiev J.d.Neef I.B.S.Tlili M.S.Abadir A.Carlin M.H.Konijnenburg J.T.v.d.Linden Y.Zorian G.Mueller J.Braun D.Richter V.N.Yarmolik V.G.Mikitjuk
Talks about:test (13) memori (7) fault (6) dram (5) generat (2) stress (2) orient (2) space (2) model (2) march (2)
Person: A. J. van de Goor
DBLP: Goor:A=_J=_van_de
Contributed to:
20102006200520042003200220011999199819971994Wrote 14 papers:
- DATE-2010-GoorGH #memory management #testing
- Memory testing with a RISC microcontroller (AJvdG, GG, SH), pp. 214–219.
- DATE-2006-Al-ArsHG #fault #modelling #testing
- Space of DRAM fault models and corresponding testing (ZAA, SH, AJvdG), pp. 1252–1257.
- DATE-2005-Al-ArsHMG #analysis #fault #framework #generative #testing
- Framework for Fault Analysis and Test Generation in DRAMs (ZAA, SH, GM, AJvdG), pp. 1020–1021.
- DATE-v2-2004-Al-ArsG #fault #in memory #memory management #testing
- Soft Faults and the Importance of Stresses in Memory Testing (ZAA, AJvdG), pp. 1084–1091.
- DATE-2003-Al-ArsGBR #fault #optimisation #simulation #testing #using
- Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation (ZAA, AJvdG, JB, DR), pp. 10484–10489.
- DATE-2003-SchanstraG #ram #test coverage
- Consequences of RAM Bitline Twisting for Test Coverage (IS, AJvdG), pp. 11176–11177.
- DATE-2002-Al-ArsG #fault #in memory #memory management #modelling #testing
- Modeling Techniques and Tests for Partial Faults in Memory Devices (ZAA, AJvdG), pp. 89–93.
- DATE-2002-GoorAC #fault
- Minimal Test for Coupling Faults in Word-Oriented Memories (AJvdG, MSA, AC), pp. 944–948.
- DATE-2001-Al-ArsG #array #behaviour #embedded #memory management
- Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs (ZAA, AJvdG), pp. 496–503.
- DATE-1999-GoorN #evaluation #industrial #testing
- Industrial Evaluation of DRAM Tests (AJvdG, JdN), pp. 623–630.
- DATE-1999-KonijnenburgLG #generative #identification #testing
- Illegal State Space Identification for Sequential Circuit Test Generation (MHK, JTvdL, AJvdG), pp. 741–746.
- DATE-1998-GoorT #testing
- March Tests for Word-Oriented Memories (AJvdG, IBST), pp. 501–508.
- EDTC-1997-GoorGYM #fault #memory management
- March LA: a test for linked memory faults (AJvdG, GG, VNY, VGM), p. 627.
- EDAC-1994-AGZS #functional #testing
- Functional Tests for Ring-Address SRAM-type FIFOs (AJvdG, YZ, IS), p. 666.