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Travelled to:
1 × France
1 × USA
Collaborated with:
S.Ozev C.K.H.Suresh O.Sinanoglu G.Shofner L.Winemberg L.Deng V.Kundur N.S.J.Naga M.K.Ozel B.Bakkaloglu S.Kiaei D.Pratab T.Dar
Talks about:
circuit (3) adapt (2) acceleromet (1) industri (1) frequenc (1) capacit (1) analysi (1) spring (1) signal (1) search (1)

Person: Ender Yilmaz

DBLP DBLP: Yilmaz:Ender

Contributed to:

DATE 20132013
DAC 20092009

Wrote 4 papers:

Electrical calibration of spring-mass MEMS capacitive accelerometers (LD, VK, NSJN, MKO, EY, SO, BB, SK, DP, TD), pp. 571–574.
DATE-2013-SureshYOS #adaptation #multi #reduction
Adaptive reduction of the frequency search space for multi-vdd digital circuits (CKHS, EY, SO, OS), pp. 292–295.
DATE-2013-YilmazSWO #analysis #fault #industrial #scalability #simulation
Fault analysis and simulation of large scale industrial mixed-signal circuits (EY, GS, LW, SO), pp. 565–570.
DAC-2009-YilmazO #adaptation
Adaptive test elimination for analog/RF circuits (EY, SO), pp. 720–725.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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