Travelled to:2 × USA
3 × France
3 × Germany
Collaborated with:R.Karri J.Rajendran S.Ozev Y.Pino E.J.Marinissen T.Petrov P.Schremmer A.Orailoglu S.Kannan N.Karimi D.Chang C.K.H.Suresh E.Yilmaz
Talks about:analysi (3) secur (3) circuit (2) reduct (2) logic (2) test (2) scan (2) manufactur (1) transform (1) memristor (1)
Person: Ozgur Sinanoglu
DBLP: Sinanoglu:Ozgur
Contributed to:
2014
2014201320122012200820072004Wrote 10 papers:
- DAC-2014-KannanKS #in memory #memory management
- Secure Memristor-based Main Memory (SK, NK, OS), p. 6.
- DATE-2014-ChangOSK #approximate #estimation #statistics
- Approximating the age of RF/analog circuits through re-characterization and statistical estimation (DC, SO, OS, RK), pp. 1–4.
- DATE-2013-RajendranSK #question
- Is split manufacturing secure? (JR, OS, RK), pp. 1259–1264.
- DATE-2013-SureshYOS #adaptation #multi #reduction
- Adaptive reduction of the frequency search space for multi-vdd digital circuits (CKHS, EY, SO, OS), pp. 292–295.
- DAC-2012-RajendranPSK #analysis #logic #obfuscation #security
- Security analysis of logic obfuscation (JR, YP, OS, RK), pp. 83–89.
- DATE-2012-RajendranPSK #analysis #encryption #fault #logic #perspective
- Logic encryption: A fault analysis perspective (JR, YP, OS, RK), pp. 953–958.
- DATE-2008-SinanogluM #analysis #composition #reduction #testing
- Analysis of The Test Data Volume Reduction Benefit of Modular SOC Testing (OS, EJM), pp. 182–187.
- DATE-2007-SinanogluP #approach
- A non-intrusive isolation approach for soft cores (OS, TP), pp. 27–32.
- DATE-2007-SinanogluS #modelling
- Diagnosis, modeling and tolerance of scan chain hold-time violations (OS, PS), pp. 516–521.
- DATE-v1-2004-SinanogluO #power management
- Scan Power Minimization through Stimulus and Response Transformations (OS, AO), pp. 404–409.