Travelled to:2 × France
4 × Germany
Collaborated with:A.Greiner E.Viaud H.Aboushady M.Louërat A.Mello I.Maia M.Vasilevski N.Beilleau K.Einwich M.Benabdenbi M.Tuna L.Andrade T.Maehne A.Vachoux C.B.Aoun A.Lévêque F.Cenni S.Scotti A.Massouri L.Clavier
Talks about:system (4) model (4) simul (3) compliant (2) parallel (2) discret (2) applic (2) event (2) base (2) tlm (2)
Person: François Pêcheux
DBLP: P=ecirc=cheux:Fran=ccedil=ois
Contributed to:
201520122010200820062004Wrote 6 papers:
- DATE-2015-AndradeMVAPL #analysis #data flow #modelling
- Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation (LA, TM, AV, CBA, FP, MML), pp. 1671–1676.
- DATE-2012-LevequePLACSMC #embedded #feedback #modelling #multi
- Holistic modeling of embedded systems with multi-discipline feedback: Application to a Precollision Mitigation Braking System (AL, FP, MML, HA, FC, SS, AM, LC), pp. 739–744.
- DATE-2010-MelloMGP #parallel #simulation
- Parallel simulation of systemC TLM 2.0 compliant MPSoC on SMP workstations (AM, IM, AG, FP), pp. 606–609.
- DATE-2008-VasilevskiPBAE #modelling
- Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN (MV, FP, NB, HA, KE), pp. 134–139.
- DATE-2006-ViaudPG #modelling #parallel #performance #simulation
- An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles (EV, FP, AG), pp. 94–99.
- DATE-v1-2004-BenabdenbiGPVT #named #testing
- STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores (MB, AG, FP, EV, MT), pp. 712–713.