Travelled to:1 × USA
Collaborated with:Y.Chang P.Lee Y.Ho C.Chang I.Lin C.Shen
Talks about:design (2) chip (2) methodolog (1) obstacl (1) packag (1) assign (1) board (1) avoid (1) rout (1) free (1)
Person: Hsu-Chieh Lee
DBLP: Lee:Hsu=Chieh
Contributed to:
2012Wrote 2 papers:
- DAC-2012-LeeC #co-evolution #design
- A chip-package-board co-design methodology (HCL, YWC), pp. 1082–1087.
- DAC-2012-LeeLHCCLS #design
- Obstacle-avoiding free-assignment routing for flip-chip designs (PWL, HCL, YKH, YWC, CFC, IJL, CFS), pp. 1088–1093.