BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × USA
3 × France
Collaborated with:
K.A.Sakallah J.Kim V.Chandramouli J.P.M.Silva R.Kaivola R.Ghughal N.Narasimhan A.Telfer S.Pandav A.Slobodová C.Taylor V.Frolov E.Reeber A.Naik
Talks about:
increment (2) satisfi (2) formal (2) engin (2) delay (2) test (2) processor (1) function (1) analysi (1) replac (1)

Person: Jesse Whittemore

DBLP DBLP: Whittemore:Jesse

Contributed to:

CAV 20092009
DAC 20012001
DATE 20002000
DATE 19981998

Wrote 4 papers:

CAV-2009-KaivolaGNTWPSTFRN #execution #testing #validation #verification
Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation (RK, RG, NN, AT, JW, SP, AS, CT, VF, ER, AN), pp. 414–429.
DAC-2001-WhittemoreKS #incremental #named #satisfiability
SATIRE: A New Incremental Satisfiability Engine (JW, JK, KAS), pp. 542–545.
DATE-2000-KimWSS #fault #incremental #on the #satisfiability #testing
On Applying Incremental Satisfiability to Delay Fault Testing (JK, JW, KAS, JPMS), pp. 380–384.
DATE-1998-ChandramouliWS #analysis #functional #named
AFTA: A Formal Delay Model for Functional Timing Analysis (VC, JW, KAS), pp. 350–355.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.