Travelled to:3 × USA
Collaborated with:I.Park C.Kyung H.Choi J.H.Yi J.Yang B.Kim S.Nam J.Cho S.Seo C.Ryu Y.Kwon D.Lee J.Kim H.Yoon J.Kim K.Lee C.Hwang I.Kim J.S.Kim K.Park K.H.Park Y.H.Lee S.H.Hwang
Talks about:softwar (2) design (2) embed (2) dsp (2) intellectu (1) properti (1) perform (1) exploit (1) develop (1) analysi (1)
Person: Jong-Yeol Lee
DBLP: Lee:Jong=Yeol
Contributed to:
200219991998Wrote 3 papers:
- DAC-2002-LeeP #analysis #design #embedded #performance #simulation
- Timed compiled-code simulation of embedded software for performance analysis of SOC design (JYL, ICP), pp. 293–298.
- DAC-1999-ChoiYLPK #design #embedded
- Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software (HC, JHY, JYL, ICP, CMK), pp. 939–944.
- DAC-1998-YangKNCSRKLLKYKLHKKPPLHPK #development #named
- MetaCore: An Application Specific DSP Development System (JHY, BWK, SJN, JHC, SWS, CHR, YSK, DHL, JYL, JSK, HDY, JYK, KML, CSH, IHK, JSK, KIP, KHP, YHL, SHH, ICP, CMK), pp. 800–803.