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Travelled to:
2 × France
4 × USA
Collaborated with:
S.H.Hwang I.Park C.Kyung J.H.Yi B.Yun Y.Lee H.Roh J.Lee N.Kim S.Lee S.Lee J.Yim Y.Hwang C.Park W.Yang H.Oh
Talks about:
design (2) model (2) embed (2) base (2) microprocessor (1) methodolog (1) intellectu (1) synthesi (1) properti (1) industri (1)

Person: Hoon Choi

DBLP DBLP: Choi:Hoon

Contributed to:

DAC 20012001
DAC 19991999
DAC 19981998
DATE 19981998
DAC 19971997
ED&TC 19971997

Wrote 6 papers:

DAC-2001-ChoiYLR #embedded #industrial #model checking
Model Checking of S3C2400X Industrial Embedded SOC Product (HC, BWY, YTL, HR), pp. 611–616.
DAC-1999-ChoiYLPK #design #embedded
Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software (HC, JHY, JYL, ICP, CMK), pp. 939–944.
DAC-1998-KimCLLPK #functional #modelling
Virtual Chip: Making Functional Models Work on Real Target Systems (NK, HC, SL, SL, ICP, CMK), pp. 170–173.
DATE-1998-YiCPHK #behaviour #multi #synthesis
Multiple Behavior Module Synthesis Based on Selective Groupings (JHY, HC, ICP, SHH, CMK), pp. 384–388.
DAC-1997-YimHPCYOPK #design #verification
A C-Based RTL Design Verification Methodology for Complex Microprocessor (JSY, YHH, CJP, HC, WSY, HSO, ICP, CMK), pp. 83–88.
EDTC-1997-ChoiH #estimation
Improving the accuracy of support-set finding method for power estimation of combinational circuits (HC, SHH), pp. 526–530.

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