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Travelled to:
1 × Germany
2 × USA
Collaborated with:
L.G.Murillo J.F.Eusse S.Yakoushkin R.Leupers G.Ascheid G.Mariani A.Brankovic G.Palermo V.Zaccaria C.Silvano
Talks about:
processor (2) system (2) hybrid (2) simul (2) methodolog (1) synchron (1) extens (1) explor (1) design (1) correl (1)

Person: Jovana Jovic

DBLP DBLP: Jovic:Jovana

Contributed to:

DAC 20122012
DATE 20122012
DAC 20102010

Wrote 3 papers:

DAC-2012-MurilloEJYLA #hybrid #simulation
Synchronization for hybrid MPSoC full-system simulation (LGM, JFE, JJ, SY, RL, GA), pp. 121–126.
DATE-2012-JovicYMELA #hybrid #simulation
Hybrid simulation for extensible processor cores (JJ, SY, LGM, JFE, RL, GA), pp. 288–291.
DAC-2010-MarianiBPJZS #design #multi
A correlation-based design space exploration methodology for multi-processor systems-on-chip (GM, AB, GP, JJ, VZ, CS), pp. 120–125.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.