Travelled to:
1 × USA
2 × Germany
Collaborated with:
K.Ohta L.Batina I.Verbauwhede M.Izumi J.Ikegami J.Fan Y.Li D.Nakatsu D.D.Hwang B.Lai P.Schaumont Y.Fan S.Yang A.Hodjat
Talks about:
design (2) countermeasur (1) cryptographi (1) implement (1) transpar (1) thumbpod (1) varianc (1) multipl (1) analysi (1) algebra (1)
Person: Kazuo Sakiyama
DBLP: Sakiyama:Kazuo
Contributed to:
Wrote 4 papers:
- DATE-2010-IzumiISO #multi
- Improved countermeasure against Address-bit DPA for ECC scalar multiplication (MI, JI, KS, KO), pp. 981–984.
- DATE-2010-LiSBNO #analysis #implementation
- Power Variance Analysis breaks a masked ASIC implementation of AES (YL, KS, LB, DN, KO), pp. 1059–1064.
- DATE-2008-FanBSV #algebra #design #encryption
- FPGA Design for Algebraic Tori-Based Public-Key Cryptography (JF, LB, KS, IV), pp. 1292–1297.
- DAC-2003-HwangLSSFYHV #design #embedded
- Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system (DDH, BCL, PS, KS, YF, SY, AH, IV), pp. 60–65.