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Travelled to:
1 × USA
Collaborated with:
A.Adir H.Azatchi E.Bin O.Peled
Talks about:
microprocessor (1) architectur (1) approach (1) generic (1) verif (1) micro (1) test (1) plan (1)

Person: Kirill Shoikhet

DBLP DBLP: Shoikhet:Kirill

Contributed to:

DAC 20052005

Wrote 1 papers:

DAC-2005-AdirABPS #approach #architecture #testing #verification
A generic micro-architectural test plan approach for microprocessor verification (AA, HA, EB, OP, KS), pp. 769–774.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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