Travelled to:1 × Brazil
1 × USA
Collaborated with:Z.Wang M.Lai L.Gao H.Lu R.Gong W.Chen F.Liu J.Guo Z.Pang L.Huang F.Chen
Talks about:architectur (2) processor (1) heterogen (1) hierarch (1) virtual (1) control (1) congest (1) channel (1) system (1) router (1)
Person: Kui Dai
DBLP: Dai:Kui
Contributed to:
2008
2008Wrote 3 papers:
- DAC-2008-LaiWGLD #architecture
- A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers (McL, ZW, LG, HL, KD), pp. 630–633.
- SAC-2008-GuoLPHCDW #design #manycore #memory management
- Hierarchical memory system design for a heterogeneous multi-core processor (JG, McL, ZP, LH, FC, KD, ZW), pp. 1504–1508.
- SAC-2008-RuiWFKZ #architecture #control flow
- Control flow checking and recovering based on 8051 architecture (RG, WC, FL, KD, ZW), pp. 1550–1551.