Travelled to:1 × Brazil
1 × USA
Collaborated with:Z.Wang K.Dai L.Gao H.Lu J.Guo Z.Pang L.Huang F.Chen
Talks about:architectur (1) processor (1) heterogen (1) hierarch (1) virtual (1) congest (1) channel (1) system (1) router (1) memori (1)
Person: Ming-che Lai
DBLP: Lai:Ming=che
Contributed to:
2008
2008Wrote 2 papers:
- DAC-2008-LaiWGLD #architecture
- A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers (McL, ZW, LG, HL, KD), pp. 630–633.
- SAC-2008-GuoLPHCDW #design #manycore #memory management
- Hierarchical memory system design for a heterogeneous multi-core processor (JG, McL, ZP, LH, FC, KD, ZW), pp. 1504–1508.