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Travelled to:
2 × USA
Collaborated with:
T.Sakurai T.Sekitani T.Yokota T.Someya H.Fuketa S.Iida T.Yasufuku M.Nomura H.Shinohara
Talks about:
transistor (1) ultraflex (1) artifici (1) minimum (1) express (1) voltag (1) electr (1) organ (1) logic (1) estim (1)

Person: Makoto Takamiya

DBLP DBLP: Takamiya:Makoto

Contributed to:

DAC 20132013
DAC 20112011

Wrote 2 papers:

DAC-2013-SekitaniYTSS #using
Electrical artificial skin using ultraflexible organic transistor (TS, TY, MT, TS, TS), p. 3.
DAC-2011-FuketaIYTNSS #logic
A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates (HF, SI, TY, MT, MN, HS, TS), pp. 984–989.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.