Travelled to:5 × USA
Collaborated with:Y.Shin S.Lee M.Takamiya T.Sekitani T.Yokota T.Someya H.Fuketa S.Iida T.Yasufuku M.Nomura H.Shinohara J.M.Rabaey D.Sylvester D.Blaauw K.Bernstein J.Frenkil M.Horowitz W.Nebel A.Yang
Talks about:power (3) voltag (2) system (2) time (2) low (2) transistor (1) ultraflex (1) artifici (1) minimum (1) express (1)
Person: Takayasu Sakurai
DBLP: Sakurai:Takayasu
Contributed to:
20132011200320012000Wrote 5 papers:
- DAC-2013-SekitaniYTSS #using
- Electrical artificial skin using ultraflexible organic transistor (TS, TY, MT, TS, TS), p. 3.
- DAC-2011-FuketaIYTNSS #logic
- A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates (HF, SI, TY, MT, MN, HS, TS), pp. 984–989.
- DAC-2003-RabaeySBBFHNSY
- Reshaping EDA for power (JMR, DS, DB, KB, JF, MH, WN, TS, AY), p. 15.
- DAC-2001-ShinS #design #power management
- Coupling-Driven Bus Design for Low-Power Application-Specific Systems (YS, TS), pp. 750–753.
- DAC-2000-LeeS #power management #realtime #runtime
- Run-time voltage hopping for low-power real-time systems (SL, TS), pp. 806–809.