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Travelled to:
1 × Israel
2 × USA
Collaborated with:
R.E.Bryant R.Raimi M.S.Abadir D.L.Beatty
Talks about:
trajectori (3) symbol (3) evalu (3) formal (2) verif (2) use (2) transitor (1) symmetri (1) exploit (1) content (1)

Person: Manish Pandey

DBLP DBLP: Pandey:Manish

Contributed to:

CAV 19971997
DAC 19971997
DAC 19961996

Wrote 3 papers:

CAV-1997-PandeyB #evaluation #symmetry #verification
Exploiting Symmetry When Verifying Transitor-Level Circuits by Symbolic Trajectory Evaluation (MP, REB), pp. 244–255.
DAC-1997-PandeyRBA #evaluation #using #verification
Formal Verification of Content Addressable Memories Using Symbolic Trajectory Evaluation (MP, RR, REB, MSA), pp. 167–172.
DAC-1996-PandeyRBB #array #evaluation #using #verification
Formal Verification of PowerPC Arrays Using Symbolic Trajectory Evaluation (MP, RR, DLB, REB), pp. 649–654.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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